Author: Edit
Date: Feb 09, 2004
Disclaimer: You can distribute this as much as you like as long as it's got my name on it and this disclaimer stays intact.
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A half adder is an important part of of what may be called a full adder. The full adder has the ability to add any two binary digits together, whether the output has a carry or not.
The half adder can only add two binary digits together and output one digit. The carry is not taken into account.
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Full adder Half Adder
1 1
+ 1 + 1
10 0
Well how do we make one of these 'half adders'?
We use things called logic gates.
Note: Before you continue reading, please ensure you have read the logic gates node, I say this so you will have a basic understanding of what is to follow.
First of all we'll need to draw up a truth table of our desired outputs. We will use this truth table to test our logic gate diagram. Having two inputs you will have only 4 possible binary combinations.
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I1 I2 O
____________
0 0 | 0
0 1 | 1
1 0 | 1
1 1 | 0
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OR O
_______
0 | 0
1 | 1
1 | 1
1 | 0
Note: I'd probably defeat my own purpose if I tried to explain the complete logic gate diagram in words so I'll make a bad attempt at ASCII art.
First we need an OR gate.
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___
I1 -------\ `-._
\ `.______
/ _,'
I2 -------/___,-'
We now take the output of the OR and feed it into an AND gate:
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___
I1 --------\ `-._ ___
\ `._________| `-.
/ _,' | \_______
I2 --------/___,-' | /
|___,-'
As we look at the output of the AND gate we can see that if one input is 0 then the output will also be binary. This is a very important discovery!
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AND Gate
I1 I2 O
____________
0 0 | 0
0 1 | 0
1 0 | 0
1 1 | 1
Using this important information, we now know that we can use the AND gate as a switch of sorts. How? Well, consider this: If we were to make one input of an AND gate a 1, then the output would be the same as the second input. Take this for example:
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AND Gate
I1 I2 O
____________
1 0 | 0
1 1 | 1
So, when we know the first input of an AND gate will be 1, then we know that the output of that AND gate will be the same as the second input.
In saying that, when I1 is 1 then the switch is open and I2 will go through as the output. This is why we have an AND gate after the OR. The OR will give us an output of 1 if it has an input of 1. So the AND gate/switch will be open whenever there is a 1 as an input.
And having established that, we can now carry on with the logic gate diagram.
So far we have:
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Feedback welcome.
___
I1 --------\ `-._ ___
\ `._________| `-.
/ _,' | \_______
I2 --------/___,-' | /
|___,-'
We now need to have a look at our AND gate's second input. We know that the first two inputs of 0 and 0 will give us a 0 as the AND gates first input. This means that the output will, of course, be a 0. So all we need to look at is the next three inputs. We want them to be as follows.
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When... We want...
I1 I2
_________________
0 1 | 1
1 0 | 1
1 1 | 0
Looking at these three outputs we look and see if there is a pattern... and is there? We already know that a normal AND gate's output is:
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AND Gate
I1 I2 O
____________
0 0 | 0
0 1 | 0
1 0 | 0
1 1 | 1
We're only interested in the last three outputs though. Lets compare them with our desired outputs.
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Desired AND Gate'sOutput Output
_____________
1 | 0
1 | 0
0 | 1
Well, there you go! They're opposite as we can quite plainly see. So the second output of our AND gate is the output of another AND gate. Only this AND gate's output will be reversed.
Well, how do I reverse an output?
To reverse an output you need a NOT gate. Basically a NOT gate is just a negating gate. It has one input and one output. The output is opposite to the input.
The final diagram:
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___
I1 --+-----\ `-._ ___
| \ `.________| `-.
| / _,' | \_______ Output
I2 --|--+--/___,-' | /
| | +-----|___,-'
| | o
| | |
| | / \
| | ___ /___\
+--|--| `-. |
| | \_____|
| | /
+--|___,-'
The final output of our wonderful diagram is:
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I1 I2 O
____________
0 0 | 0
0 1 | 1
1 0 | 1
1 1 | 0